Intel is trying to get back to being relevant in the Semiconductor game.
Intel announced a $20 billion (USD) investment in two new manufacturing facilities (fabs) in Arizona. They will start production in 2024.
CEO Pat Gelsinger said the 7nm manufacturing node from Intel is now running on schedule. The first product enabled with 7nm will be Ponte Vecchio, the upcoming high-performance compute accelerator for the Aurora supercomputer. Meteor Lake will be a client CPU compute tile for a volume 2023 product. Intel’s compute tile / chiplet will finish tape-in (design IP verification) by Q2 2021, and will leverage Intel’s advanced packaging techniques. After design manufacturing, tape-out (whole chip design verification) usually takes 4-6+ months, and then the designs are sent to the fabs for initial production and test runs.
Great, Intel will finally push out 7nm devices. TSMC (Taiwan Semiconductor) is scaling up its 5nm process manufacturing capacity to 105,000 wafers monthly in the first half of 2021, up from 90,000 units in fourth-quarter 2020, with plans to further expand the process capacity to 120,000 units in the second half of 2021.
TSMC technology is currently 1.5 generations ahead of Intel. Intel is trying to stay 1.5 generations behind but if Intel is on 7nm in 2024 they will be three generations behind. If Intel is on 5nm then they are two generations behind. Nvidia, Apple, AMD, Tesla etc… all will still be using TSMC. Intel is using TSMC but struggling not to get completely knocked out of the fab game and going fabless like AMD and others.
Intel Doing More With TSMC
Intel roadmap will stil use a mixture of internal and external process node manufacturing depending on the product capabilities. Intel already spends more than $7 billion USD at TSMC annually. Intel will use TSMC even more. If Intel wants 5-nanometers and then 3-nanometer from 2021-2023 then they will be using TSMC.
Intel will use TSMC, Samsung, GlobalFoundriers, and UMC.
TSMC, Apple’s main chip supplier, is on track to begin risk production of a 3-nanometer fabrication process in the second half of this year (2021), when the foundry will be capable of processing 30,000 wafers built using the more advanced technology.
TSMC’s N3 node is on track to deliver historic performance and power consumption improvements stated the company’s chairman Dr. Mark Liu at the International Solid-State Circuits Conference (ISSC) last month. Dr. Liu also highlighted technological breakthroughs made by his firm in materials sciences. He revealed that TSMC has developed a new material that will work with carbon nanotube channels to create new transistors.
TSMC is on another level of semiconductor technology as Intel has to prove it can figure out 7nm. TSMC will be at 2nm chips 2023-2024 and is projected to double sales by 2023-2024.
Samsung is shipping various processes based on finFETs at 7nm and 5nm, with plans to introduce nanosheets at 3nm in 2022/2023. TSMC will extend the finFET to 3nm, but will migrate to nanosheet FETs at 2nm in 2024/2025.
Nanosheet FETs incorporate several components, including a channel, which allows electrons to flow through the transistor. The first nanosheet FETs will consist of traditional silicon-based channel materials, but the next-generation versions will have high-mobility channel materials.
SOURCES- Digitimes, Intel, TSMC, Semiengineering
Written By Brian Wang, Nextbigfuture.com